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Products > Discontinued Products > VECP Starter Kit (Xilinx ZU3EG) > VECP Starter Kit |
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VECP Starter Kit |
- Xilinx Zynq UltraScale+ ZU3EG MPSoC based on 1.2 GHz Quad Arm Cortex-A53 and 600MHz Dual Cortex-R5 Cores
- 4GB DDR4, 4GB eMMC, 128MB QSPI Flash
- 1 x USB 3.0 Host, 1 x USB 3.0 Device, 1 x USB-UART, 2 x Gigabit Ethernets, MIPI-CSI, HDMI, TF…
- SONY imx334 4K Sensor
- Ready to Run Linux OS
- 4k/30fps Image Signal Processing IP Core
- GigE Vison 2.0 IP Core
- Machine Vision USB3 Vision IP Core
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MYIR is a Xilinx Alliance Member, welcome to use MYIR's Xilinx products!
We also offer custom design services, welcome your inquiry!
http://www.xilinx.com/alliance/memberlocator/1-2wv1bc.html
The VECP
Starter Kit is an affordable and complete Vision
Edge Computing Platform to provide an
excellent image processing solution for computer vision development based
on Xilinx Zynq
UltraScale+ ZU3EG MPSoC which
features a 1.2 GHz quad-core ARM
Cortex-A53 64-bit application
processor, a 600MHz dual-core real-time ARM
Cortex-R5 processor, a Mali400
embedded GPU and rich FPGA fabric. The kit comes with a MYD-CZU3EG-ISP development board and
some necessary cable accessories to help users start their development rapidly.
The MYD-CZU3EG-ISP development board is capable of handling 4K video at 30fps through
the built-in ISP core and can implement ultra-low delay video transmission at maximum
0.7ms. The input videos support Bayer, YCbCr
and RGB formats to meet the demand of
high frame rate and high-resolution image acquisition. The image can be output
through diversified image output interfaces including HDMI, Gigabit Ethernet and USB 3.0. The integrated GigE vision
IP core supports Machine Vision GenICam V2.4.0 standard and user-defined XML files. The USB3 vison IP core also meets the industrial
machine vision standard.
VECP Data Processing Frame
The MYD-CZU3EG-ISP development board consists of a MYC-CZU3EG CPU Module with installed active heatsink, a base board and a SONY imx334 4K Sensor which is installed on the rear of the base board and connected to the MIPI-CSI interface through an FPC cable. From the CPU PL part, the board has extended one Gigabit Ethernet, one USB 3.0
device and one HDMI interface for
image output. From the PS part, the board has extended one USB-to-UART interface, one USB 3.0
Host, one TF card slot and one Gigabit Ethernet for data communication purpose. The board is
ready to run Linux operating system provided with plenty of
software resources.
MYIR also offer custom design services for board design based on the MYD-CZU3EG-ISP development board or customized image sensors or customized IP cores according to customers’ requirements.
The
built-in ISP core of the MYD-CZU3EG-ISP development board has excellent image processing
capabilities. It has outstanding intelligent noise reduction effect and can
separate from motion area and background accurately. The digital WDR function
and super 3D denoise technology of the ISP core can restore information from ultra-low
illuminance precisely. The automatic exposure strategy can be adopted according
to different usage scenarios and the color reduction is strong. The right images below are processed through
the IP cores of the MYD-CZU3EG-ISP development board which may make you feel the difference.
Image Effect Comparison
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Features
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Description
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CPU
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Xilinx Zynq UltraScale+ XCZU3EG-1SFVC784E (ZU3EG, 784 Pin Package) MPSoC
- 1.2GHz 64 bit Quad-core ARM® Cortex™-A53
- 600MHz Dual-core ARM® Cortex™-R5 proce
- ARM Mali™-400MP2 Graphics Processor
- 16nm FinFET+ FPGA fabric
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RAM
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4GB DDR4 SDRAM (64-bit, 2400MHz)
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Flash
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4GB eMMC, 128MB QSPI
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PS Unit
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One USB 3.0 Host
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One USB-UART interface
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One TF card slot
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One 10/100/1000Mbps Ethernet interface
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One 2.54mm pitch 14-pin JTAG interface (PS, PL reused)
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PL Unit
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One HDMI interface
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One 10/100/1000Mbps Ethernet interface
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One USB 3.0 device
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One MIPI-CSI interface (0.5mm pitch 40-pin FPC connector, on the rear of the base board)
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IO Expansion interface (0.5mm pitch 50-pin FPC connector, on the rear of the base board)
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Image Sensor
SONY IMX334LLR
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Resolution: 3840(H) x 2160 (V)
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Mega Pixels: 8.42 MP
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Frame Rate: 60 to 120 fps
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ADC Resolution: 12-bit
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Pixel Size: 2.0 μm × 2.0 μm
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Interface: MIPI CSI-2
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Dimensions
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106.71mm x 69.98mm (base board)
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Power supply
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DC12V/2A
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Working temp.
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0~70 Celsius (commercial grade)
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OS support
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Linux 4.14.0
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Target applications
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IoT, Medical, Machine Vision, Industry, etc.
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Packing List
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One VECP Development Board
One HDMI cable
One 12V/2A Power
adapter
One Mini USB 2.0 cable
One 16GB TF card
One Product disk
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Features of VECP Starter Kit
VECP Starter Kit in the Video
- $599 Xilinx ZYNQ UltraScale MPSoC VECP Kit with MIPI-CSI for image processing
- VECP Start Kit based on Zynq UltraScale+ MPSoC image output test
Other MYIR's Xilinx Products
http://www.myirtech.com/xilinxseries.asp
Z-turn Board Single Board Computer (based on Zynq-7010 / 7020)
Z-turn Lite Single Board Computer (based on Zynq-7007S / Zynq-7010)
MYD-C7Z015 Development Board (MYC-C7Z015 CPU Module as core board)
MYD-Y7Z010/20 Development Board (MYC-Y7Z010/20 CPU Module as core board)
MYD-C7Z010/20 Development Board (MYC-C7Z010/20 CPU Module as core board)
MYD-CZU3EG Development Board (MYC-CZU3EG CPU Module as core board)
MYD-CZU4EV Development Board (MYC-CZU4EV CPU Module as core board)
FZ3 Card - deep learning accelerator card (based on Xilinx Zynq UltraScale+ ZU3EG MPSoC)
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Hardware Features
Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Built on a common real-time processor and programmable logic equipped platform, three distinct variants include dual application processor (CG) devices, quad application processor and GPU (EG) devices, and video codec (EV) devices.
Zynq UltraScale+ MPSoCs
The Zynq UltraScale+ family provides footprint compatibility to enable users to migrate designs from one device to another. Any two packages with the same footprint identifier code (last letter and number sequence) are footprint compatible. MYIR is using the XCZU3EG-1SFVC784E MPSoC for MYD-CZU3EG Development Board by default, the C784 package covers the widest footprint compatibilities that enable users to select devices among CG, EG and EV.
Zynq UltraScale+ MPSoC Device Migration Table
MYIR may also supply the MYC-CZU3EG CPU Modules with XCZU2CG, XCZU3CG, XCZU4EV or XCZU5EV MPSoC as options. The main features for the MPSoC devices are summarized as below.
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Device
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XCZU2CG
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XCZU3CG
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XCZU3EG
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XCZU4EV
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XCZU5EV
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Logic cells (k)
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103
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154
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154
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192
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256
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CLB Flip-Flops (K)
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94
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141
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141
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176
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234
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CLB LUTs (K)
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47
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71
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71
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88
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117
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Block RAM (Mb)
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5.3
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7.6
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7.6
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4.5
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5.1
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UltraRAM (Mb)
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-
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-
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-
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13.5
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18.0
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DSP Slices
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240
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360
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360
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728
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1,248
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GTX transceivers
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PS-GTR4x (6Gb/s)
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PS-GTR4x (6Gb/s)
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PS-GTR4x (6Gb/s)
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PS-GTR4x (6Gb/s), GTH4x (16.3Gb/s)
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PS-GTR4x (6Gb/s), GTH4x (16.3Gb/s)
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Processor Units
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Application Processor Unit
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Dual-core ARM® Cortex™-A53 MPCore™ up to 1.3GHz
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Quad-core ARM® Cortex™-A53 MPCore™ up to 1.5GHz
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Memory w/ECC
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L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB
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Real-Time Processor Unit
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Dual-core ARM Cortex-R5 MPCore™ up to 600MHz
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Memory w/ECC
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L1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per core
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Graphics Processing Unit
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-
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Mali™-400 MP2 up to 667MHz
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Video Codec
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-
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H.264 / H.265
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Memory L2 Cache
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64KB
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External Memory, Connectivity, Integrated Block Functionality
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Dynamic Memory Interface
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x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC
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Static Memory Interfaces
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NAND, 2x Quad-SPI
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High-Speed Connectivity
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PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet
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General Connectivity
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2 x USB 2.0, 2 x SD/SDIO, 2 x UART, 2 x CAN 2.0B, 2 x I2C, 2 x SPI, 4 x 32b GPIO
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Power Management
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Full / Low / PL / Battery Power Domains
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Security
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RSA, AES, and SHA
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AMS - System Monitor
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10-bit, 1MSPS – Temperature and Voltage Monitor
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Zynq UltraScale+ MPSoC Device Selection Guide
Function Block Diagram of MYD-CZU3EG-ISP Development Board
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Software Features
The MYD-CZU3EG-ISP Development Board is preloaded with Linux OS. MYIR provides software package in a product disk along with the goods delivery. The software package features as below:
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Item
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Features
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Description
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Remark
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Cross compiler
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gcc 7.2.1
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gcc version 7.2.1 (Linaro
GCC7.2)
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Boot program
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BOOT.BIN
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First boot program including FSBL, u-boot2018.01
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Source code provided
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Linux Kernel
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Linux 4.14.0
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Customized kernel for VECP Starter Kit
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Source code provided
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Drivers
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USB Host
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USB2.0/USB3.0 Host driver
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Source code provided
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Ethernet
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Gigabit Ethernet driver
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Source code provided
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MMC/SD/TF
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MMC/SD/TF card driver
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Source code provided
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Camera
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Camera driver
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Source code provided
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HDMI
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HDMI (SiI1136 X chip) driver
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Source code provided
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Button
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Button driver
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Source code provided
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UART
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UART driver
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Source code provided
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I2C
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I2C driver
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Source code provided
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LED
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LED driver
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Source code provided
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GPIO
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GPIO driver
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Source code provided
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QSPI
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QSPI Flash MT25QU512ABB driver
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Source code provided
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Watch dog
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Watch dog driver
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Source code provided
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Applications
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Net
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Socket program
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Source code provided
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File System
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Ramdisk
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Ramdisk system image
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File System
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Rootfs.tar
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Buildroot, including QT
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Source code provided
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Software Features of VECP Starter Kit
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Relative Download and Links
You can download relative chip datasheet, products datasheet, user manual, software package from below. Detailed technical data available on request.
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1
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VECP Starter Kit Overview
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984 KB
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2
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Zynq UltraScale+ MPSoC Product Selection Guide
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1.88 MB
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3
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MYC-CZU3EG Pinouts Description
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525 KB
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MYD-CZU3EG-ISP development board top-view (without active heatsink installed)
MYD-CZU3EG-ISP development board bottom-view (without image sensor installed)
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Price and Ordering
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Item
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Packing List
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Unit Price
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Ordering
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VECP Starter Kit
(Part No.: MYD-CZU3EG-4E4D-1200-C-ISP)
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- One MYD-CZU3EG-ISP development board
(with active heatsink and image sensor)
- One 12V/2A Power Adapter
- One Mini USB Cable
- One 16GB TF Card
- One HDMI Cable
- One Product disk
(Including user manual, datasheet,
base board schematic in PDF format
and software packages)
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USD599
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MYD-CZU3EG-ISP Development Board
(Part No.: MYD-CZU3EG-4E4D-1200-C-ISP-S)
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- One MYD-CZU3EG-ISP development board
(with active heatsink and image sensor)
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Production recommended
Please inquire MYIR
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Note:
We accept custom design based on the MYD-CZU3EG-ISP development board or customized image sensors or customized IP cores according to customers’ requirements. Please contact MYIR.
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Overview